SAM4L Datasheet, PDF (620/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
1: Oversampling at 8 times the baud rate.
• CLKO: Clock Output Select
0: The USART does not drive the CLK pin.
1: The USART drives the CLK pin unless USCLKS selects the external clock.
• MODE9: 9-bit Character Length
0: CHRL defines character length.
1: 9-bit character length.
• MSBF/CPOL: Bit Order or SPI Clock Polarity
If USART does not operate in SPI Mode:
MSBF=0: Least Significant Bit is sent/received first.
MSBF=1: Most Significant Bit is sent/received first.
If USART operates in SPI Mode, CPOL is used with CPHA to produce the required clock/data relationship between devices.
CPOL=0: The inactive state value of CLK is logic level zero.
CPOL=1: The inactive state value of CLK is logic level one.
• CHMODE: Channel Mode
Table 24-18.
CHMODE
0
0
0
1
1
0
1
1
Mode Description
Normal Mode
Automatic Echo. Receiver input is connected to the TXD pin.
Local Loopback. Transmitter output is connected to the Receiver input.
Remote Loopback. RXD pin is internally connected to the TXD pin.
• NBSTOP: Number of Stop Bits
Table 24-19.
NBSTOP
0
0
0
1
1
0
1
1
Asynchronous (SYNC=0)
1 stop bit
1.5 stop bits
2 stop bits
Reserved
Synchronous (SYNC=1)
1 stop bit
Reserved
2 stop bits
Reserved
• PAR: Parity Type
Table 24-20.
PAR
0
0
0
0
0
1
0
1
1
0
1
1
Parity Type
0
Even parity
1
Odd parity
0
Parity forced to 0 (Space)
1
Parity forced to 1 (Mark)
x
No parity
x
Multidrop mode
• SYNC/CPHA: Synchronous Mode Select or SPI Clock Phase
If USART does not operate in SPI Mode (MR.MODE is not equal to 0xE or 0xF):
SYNC = 0: USART operates in Asynchronous mode.
42023C–SAM–02/2013
620