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SAM4L Datasheet, PDF (1034/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU
ATSAM4L4/L2
39.6.5.2
The Clock Division field (CLKDIV) in TIM register defines the division ratio in the clock divider.
This gives extra flexibility in frame rate setting.
FrameRate
=
---------------------------------F----(--C-----L---K----_---L----C----D-----)--------------------------------
(K × N × (1 + CLKDIV) × 2(1 – WMOD))
Where:
N = prescaler divider (8 or 16).
K = 8 for 1/4, 1/2 and static duty.
K = 6 for 1/3 duty.
WMOD = 0 in low power waveform mode, = 1 in standard waveform mode.
Table 39-4. LCD Clock Divider (1/4 Duty, WMOD=1)
Frame rate (1/4 Duty)
CLKDIV[2:0]
Divided
by
F(CLK_LCD) = 32 kHz
N=8
N=16
F(CLK_LCD) = 32768 Hz
N=8
N=16
000
1
500 Hz
250 Hz
512 Hz
256 Hz
001
2
250 Hz
125 Hz
256 Hz
128 Hz
010
3
166.667 Hz
83.333 Hz
170.667 Hz
85.333 Hz
011
4
125 Hz
62.5 Hz
128 Hz
64 Hz
100
5
100 Hz
50 Hz
102.4 Hz
51.2 Hz
101
6
83.333 Hz
41.667 Hz
85.333 Hz
42.667 Hz
110
7
71.429 Hz
35.714 Hz
73.143 Hz
36.671 Hz
111
8
62.5 Hz
31.25 Hz
64 Hz
32 Hz
Note that when using 1/3 duty, the frame rate is increased by 33% compared to the values listed
above and in low power waveform mode, the frame rate is divided by two.
Table 39-5.
CLK_LCD
32.768 kHz
32.768 kHz
32.768 kHz
32.768 kHz
Frame Rate Examples (WMOD=1)
Duty K PRESC N CLKDIV[2:0]
Static 8
1
16
4
1/2 8
1
16
4
1/3 6
1
16
4
1/4 8
1
16
4
Frame rate
32768 / (8*16*(1+4)) = 51.2 Hz
32768 / (8*16*(1+4)) = 51.2 Hz
32768 / (6*16*(1+4)) = 68.267 Hz
32768 / (8*16*(1+4)) = 51.2 Hz
Frame Counters
For several functions (blinking modes,...) a frame counter is used to create a time base. There
are three independent frame counters (FC0, FC1 and FC2) which can be associated to any
function (refer to corresponding section).
fFCx
=
---------F----r--a---m-----e---R-----a---t--e----------
(TIM.FCx × 8) + 1
For FC0 only, the prescaler of 8 can be bypassed by writting a one to TIM.FC0PB.
Note that frame counter frequency depends on frame duration therefore of waveform mode.
42023C–SAM–02/2013
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