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SAM4L Datasheet, PDF (594/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU
ATSAM4L4/L2
Figure 24-30. Slave Node Synchronization
Baud Rate
Clock
RXD
LINIDRX
Break Field
13 dominant bits (at 0)
Synchro Counter
Break
Delimiter
1 recessive bit
Start
Bit
1
01010
Synch Byte = 0x55
1
0
Stop Start
Bit Bit
ID0
ID1
ID2
ID3
ID4
ID5
ID6
ID7
Stop
Bit
(at 1)
Reset
000_0011_0001_0110_1101
BRGR
Clcok Divider (CD)
BRGR
Fractional Part (FP)
Initial CD
0000_0110_0010_1101
Initial FP
101
The synchronization accuracy depends on:
• The theoretical slave node clock frequency; nominal clock frequency (FNom)
• The baud rate
• The oversampling mode (OVER=0 => 16x, or OVER=1 => 8x)
The following formula is used to calculate synchronization deviation, where FSLAVE is the real
slave node clock frequency, and FTOL_UNSYNC is the difference between FNom and FSLAVE. Accord-
ing to the LIN specification, FTOL_UNSYNCH may not exceed ±15%, and the bit rates between two
nodes must be within ±2% of each other, resulting in a maximal BaudRate_deviation of ±1%. If
FTOL_UNSYNCH exceeds ±15%, LINBRR will not be updated with new values, and the LIN Sync
Tolerance Error bit (CSR.LINSTE) is set.
BaudRate_deviation
=
⎛
⎝
100
×
[---α------×----8-----×-----(--2-----–-----O-8----V×----E-F---R-S---)L---A-+--V---βE----]---×-----B----a---u----d---R----a----t--e-⎠⎞
%
⎛
⎞
BaudRate_deviation
=
⎜
⎜
⎜
⎝
100
×
[---α------×----8---8--×---×--(--⎝⎛2---F-----–---T------OO--------L--V---1_-----EU--0------RN0------S---)----Y---+---N-------βC-----⎠⎞-]---x×---F--B--N--a-o--u-m---d---R----a----t--e-⎠⎟⎟⎟
%
–0.5 ≤ α ≤ +0.5 -1 < β < +1
Minimum nominal clock frequency with a fractional part:
⎛
⎞
F Nom ( min )
=
⎜
⎜ 100
×
[---0---.--5-----×-----8----×-----(---2----–-----O-----V----E----R----)----+-----1----]---×-----B----a---u----d---R----a----t-e--⎟⎟
Hz
⎜
⎝
8
×
⎛
⎝
-–---1---5--
100
+
1⎠⎞
×
1%
⎟
⎠
Examples:
• Baud rate = 20 kbit/s, OVER=0 (Oversampling 16x) => FNom(min) = 2.64MHz
• Baud rate = 20 kbit/s, OVER=1 (Oversampling 8x) => FNom(min) = 1.47MHz
• Baud rate = 1 kbit/s, OVER=0 (Oversampling 16x) => FNom(min) = 132 kHz
• Baud rate = 1 kbit/s, OVER=1 (Oversampling 8x) => FNom(min) = 74 kHz
If the fractional part is not used, the synchronization accuracy is much lower. The 16 most signif-
icant bits, added with the first least significant bit, becomes the new clock divider (LINCD). The
equation of the baud rate deviation is the same as above, but the constants are:
42023C–SAM–02/2013
594