SAM4L Datasheet, PDF (619/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
24.7.2 Mode Register
Name:
MR
Access Type:
Read-write
Offset:
0x04
Reset Value:
0x00000000
31
30
29
28
27
ONEBIT
MODSYNC
MAN
FILTER
–
26
25
24
MAX_ITERATION
23
INVDATA
22
VAR_SYNC
21
DSNACK
20
INACK
19
OVER
18
CLKO
17
MODE9
16
MSBF/CPOL
15
14
CHMODE
13
12
NBSTOP
11
10
PAR
9
8
SYNC/CPHA
7
6
5
4
3
2
1
0
CHRL
USCLKS
MODE
This register can only be written if write protection is disabled in the “Write Protect Mode Register” (WPMR.WPEN is zero).
• ONEBIT: Start Frame Delimiter Selector
0: The start frame delimiter is a command or data sync, as defined by MODSYNC.
1: The start frame delimiter is a normal start bit, as defined by MODSYNC.
• MODSYNC: Manchester Synchronization Mode
0: The manchester start bit is either a 0-to-1 transition, or a data sync.
1: The manchester start bit is either a 1-to-0 transition, or a command sync.
• MAN: Manchester Encoder/Decoder Enable
0: Manchester endec is disabled.
1: Manchester endec is enabled.
• FILTER: Infrared Receive Line Filter
0: The USART does not filter the receive line.
1: The USART filters the receive line by doing three consecutive samples and uses the majority value.
• MAX_ITERATION
This field determines the number of acceptable consecutive NACKs when in protocol T=0.
• INVDATA: Inverted Data
0: The TXD and RXD transmissions equal the values written to THR and read from RHR. Normal mode of operation.
1: The TXD and RXD transmissions equal the xor’ed values written to THR and read from RHR. Inverted mode of operation,
parity is accounted for.
• VAR_SYNC: Variable Synchronization of Command/Data Sync Start Frame Delimiter
0: Sync pattern according to MODSYNC.
1: Sync pattern according to THR.TXSYNH.
• DSNACK: Disable Successive NACK
0: NACKs are handled as normal, unless disabled by INACK.
1: The receiver restricts the amount of consecutive NACKs by MAX_ITERATION value. If MAX_ITERATION=0 no NACK will be
issued and the first erroneous message is accepted as a valid character, setting CSR.ITER.
• INACK: Inhibit Non Acknowledge
0: The NACK is generated. In SPI master mode, transmission is as usual.
1: The NACK is not generated. In SPI master mode, data in THR will not be sent until RXRDY is zero.
• OVER: Oversampling Mode
0: Oversampling at 16 times the baud rate.
42023C–SAM–02/2013
619