SAM4L Datasheet, PDF (48/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
At power-up or after a reset, the ATSAM4L4/L2 is in the RUN0 mode. Only the necessary clocks
are enabled allowing software execution. The Power Manager (PM) can be used to adjust the
clock frequencies and to enable and disable the peripheral clocks.
When the CPU is entering a Power Save Mode, the CPU stops executing code. The user can
choose between four Power Save Modes to optimize power consumption:
• SLEEP mode: the Cortex-M4 core is stopped, optionally some clocks are stopped,
peripherals are kept running if enabled by the user.
• WAIT mode: all clock sources are stopped, the core and all the peripherals are stopped
except the modules running with the 32kHz clock if enabled. This is the lowest power
configuration where SleepWalking is supported.
• RETENTION mode: similar to the WAIT mode in terms of clock activity. This is the lowest
power configuration where the logic is retained.
• BACKUP mode: the Core domain is powered off, the Backup domain is kept powered.
A wake up source exits the system to the RUN mode from which the Power Save Mode was
entered.
A reset source always exits the system from the Power Save Mode to the RUN0 mode.
The configuration of the I/O lines are maintained in all Power Save Modes. Refer to Section 11.
”Backup Power Manager (BPM)” on page 133.
6.1.1
SLEEP mode
The SLEEP mode allows power optimization with the fastest wake up time.
The CPU is stopped. To further reduce power consumption, the user can switch off modules-
clocks and synchronous clock sources through the BPM.PMCON.SLEEP field (See Table 6-1).
The required modules will be halted regardless of the bit settings of the mask registers in the
Power Manager (PM.AHBMASK, PM.APBxMASK).
Table 6-1. SLEEP mode Configuration
BPM.PSAVE.SLEEP
0
1
2
3
CPU
clock
Stop
Stop
Stop
Stop
AHB
clocks
Run
Stop
Stop
Stop
APB clocks
GCLK
Run
Run
Stop
Stop
Clock sources:
OSC, RCFAST,
RC80M, PLL,
DFLL
Run
Run
Run
Stop
RCSYS
Run
Run
Run
Run
OSC32K
RC32K⁽²⁾
Run
Run
Run
Run
Wake up Sources
Any interrupt
Any interrupt⁽¹⁾
Any interrupt⁽¹⁾
Any interrupt⁽¹⁾
Notes: 1. from modules with clock running.
2. OSC32K and RC32K will only remain operational if pre-enabled.
6.1.1.1
Entering SLEEP mode
The SLEEP mode is entered by executing the WFI instruction.
Additionally, if the SLEEPONEXIT bit in the Cortex-M4 System Control Register (SCR) is set,
the SLEEP mode will also be entered when the Cortex-M4 exits the lowest priority ISR. This
48
42023C–SAM–02/2013