SAM4L Datasheet, PDF (262/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

Figure 14-2. Memory Map for the Flash Memories
Offset from
base address
0x0080 0000
Reserved
User Page
ATSAM4L4/L2
pw
0
Flash base address
Flash with User Page
All addresses are byte addresses
14.5.5
High Speed Read Mode
The flash provides a High Speed Read Mode, offering slightly higher flash read speed at the
cost of higher power consumption. Two dedicated commands, High Speed Read Mode Enable
(HSEN) and High Speed Read Mode Disable (HSDIS) control the speed mode. The High Speed
Mode (HSMODE) bit in the Flash Status Register (FSR) shows which mode the flash is in. After
reset, the High Speed Mode is disabled, and must be manually enabled if the user wants to.
Refer to Section 42. ”Electrical Characteristics” on page 1106 at the end of this datasheet for
details on the maximum clock frequencies in Normal and High Speed Read Mode.
42023C–SAM–02/2013
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