SAM4L Datasheet, PDF (134/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

11.3 Block Diagram
Figure 11-1. BPM Block Diagram
Backup domain
Voltage
R e g u la to r
V R E G IF
NVIC
BPM
interrupt
Backup
EIC Pins
Standard
EIC Pins
G P IO
C o n tro lle r
ATSAM4L4/L2
C o rte x-M 4
WFI
instruction
Power Scaling
PMCON
Configuration
BPM State Machine
Power Save
Modes
CLK_BPM
PM
RCAUSE
User Interface
BKUPMUX
BKUPWCAUSE
PB Bus
I/O Line
Management
WAKE UP
Management
Backup Reset
BPM
EIC
EIC
BOD33
BOD18
WDT
AST
11.4 Product Dependencies
In order to use this module, other parts of the system must be configured correctly, as described
below.
11.4.1 Clocks
The clock for the BPM bus interface (CLK_BPM) is generated by the Power Manager. This clock
is enabled at reset, and can be disabled in the Power Manager.
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