HD64F38602R Datasheet, PDF (96/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 4 Clock Pulse Generators
4.1 Register Description
• Oscillator control register (OSCCR)
4.1.1 Oscillator Control Register (OSCCR)
OSCCR controls the subclock oscillator, on-chip feedback resistance, and on-chip oscillator.
Initial
Bit
Bit Name Value R/W Description
7
SUBSTP 0
R/W Subclock Oscillator Control
Controls start and stop of the subclock oscillator. When
the subclock is not used, set this bit to 1.
0: Subclock oscillator operates
1: Subclock oscillator stops
6
RFCUT 0
R/W On-chip Feedback Resistance Control
Selects whether the on-chip feedback resistance in the
system clock oscillator is used when an external clock
is input or when the on-chip oscillator is used.
After setting this bit in the state in which an external
clock is input or the on-chip oscillator is used,
temporarily transit to standby mode, watch mode, or
subactive mode. The setting of whether the feedback
resistance in the system clock oscillator is used or not
takes effect when standby mode, watch mode, or
subactive mode is entered.
0: On-chip feedback resistance in system clock
oscillator is used
1: On-chip feedback resistance in system clock
oscillator is not used
5
SUBSEL 0
R/W Subclock Select
Selects by which oscillator the subclock pulse
generator operates.
0: Subclock oscillator operates
1: On-chip oscillator operates
Note: The SUBSEL bit setting can be changed only
when the subclock is not being used.
Rev. 3.00 May 15, 2007 Page 64 of 516
REJ09B0152-0300