HD64F38602R Datasheet, PDF (186/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 10 Timer W
Table 10.1 Timer W Functions
Item
Count clock
General registers
(output compare/input
capture registers)
Counter clearing function
Initial output value
setting function
Buffer function
Compare
0
match output ₁
Toggle
Input capture function
PWM mode
Interrupt sources
Input/Output Pins
Counter FTIOA
FTIOB
FTIOC
FTIOD
Internal clocks: φ, φ/2, φ/4, φ/8, φ , φ /4, and φ /16
WW
W
External clock: FTCI
Period
GRA
specified in
GRA
GRB
GRC (buffer GRD (buffer
register for register for
GRA in
GRB in
buffer mode) buffer mode)
GRA
GRA
—
—
—
compare compare
match
match
—
Yes
Yes
Yes
Yes
—
—
—
—
—
—
Overflow
Yes
Yes
Yes
Yes
Yes
—
Compare
match/input
capture
Yes
Yes
Yes
Yes
Yes
Yes
Compare
match/input
capture
—
Yes
Yes
Yes
Yes
Yes
Compare
match/input
capture
—
Yes
Yes
Yes
Yes
Yes
Compare
match/input
capture
Rev. 3.00 May 15, 2007 Page 154 of 516
REJ09B0152-0300