HD64F38602R Datasheet, PDF (185/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 10 Timer W
Section 10 Timer W
The timer W has a 16-bit timer having output compare and input capture functions. The timer W
can count external events and output pulses with an arbitrary duty cycle by compare match
between the timer counter and four general registers. Thus, it can be applied to various systems.
10.1 Features
• Selection of eight counter clock sources: seven internal clocks (φ, φ/2, φ/4, φ/8, φ_W, φ_W/4, and
φ_W/16) and an external clock (external events can be counted)
• Capability to process up to four pulse outputs or four pulse inputs
• Four general registers:
 Independently assignable output compare or input capture functions
 Usable as two pairs of registers; one register of each pair operates as a buffer for the output
compare or input capture register
• Four selectable operating modes:
 Waveform output by compare match
Selection of 0 output, 1 output, or toggle output
 Input capture function
Rising edge, falling edge, or both edges
 Counter clearing function
Counters can be cleared by compare match
 PWM mode
Up to three-phase PWM output can be provided with desired duty ratio.
• Any initial timer output value can be set
• Five interrupt sources
Four compare match/input capture interrupts and an overflow interrupt.
• Use of module standby mode enables this module to be placed in standby mode independently
when not used. (The timer W is halted as the initial value. For details, refer to section 5.4,
Module Standby Function.)
Table 10.1 summarizes the timer W functions, and figure 10.1 shows a block diagram of the timer
W.
TIM08W0A_000020020200
Rev. 3.00 May 15, 2007 Page 153 of 516
REJ09B0152-0300