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HD64F38602R Datasheet, PDF (412/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer
Section 20 List of Registers
20.3 Register States in Each Operating Mode
Register
Abbreviation Reset
FLMCR1
Initialized
FLMCR2
Initialized
FLPWCR
Initialized
EBR1
Initialized
FENR
Initialized
RTCFLG

RSECDR

RMINDR

RHRDR

RWKDR

RTCCR1

RTCCR2

RTCCSR
Initialized
ICCR1
Initialized
ICCR2
Initialized
ICMR
Initialized
ICIER
Initialized
ICSR
Initialized
SAR
Initialized
ICDRT
Initialized
ICDRR
Initialized
PFCR
Initialized
PUCR8
Initialized
PUCR9
Initialized
PODR9
Initialized
TMB1
Initialized
TCB1/TLB1 Initialized
Active



























Sleep Watch



























Subactive Subsleep Standby Module


Initialized ROM








Initialized






RTC
























IIC2
























System



I/O ports









Timer B1



Rev. 3.00 May 15, 2007 Page 380 of 516
REJ09B0152-0300