HD64F38602R Datasheet, PDF (499/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Appendix
Instruction Mnemonic
INC
INC.B Rd
INC.W #1/2, Rd
INC.L #1/2, ERd
JMP
JMP @ERn
JMP @aa:24
JMP @@aa:8
JSR
JSR @ERn
JSR @aa:24
JSR @@aa:8
LDC
LDC #xx:8, CCR
LDC Rs, CCR
LDC@ERs, CCR
LDC@(d:16, ERs), CCR
LDC@(d:24,ERs), CCR
LDC@ERs+, CCR
LDC@aa:16, CCR
LDC@aa:24, CCR
MOV
MOV.B #xx:8, Rd
MOV.B Rs, Rd
MOV.B @ERs, Rd
MOV.B @(d:16, ERs), Rd
MOV.B @(d:24, ERs), Rd
MOV.B @ERs+, Rd
MOV.B @aa:8, Rd
MOV.B @aa:16, Rd
MOV.B @aa:24, Rd
MOV.B Rs, @Erd
MOV.B Rs, @(d:16, ERd)
MOV.B Rs, @(d:24, ERd)
MOV.B Rs, @-ERd
MOV.B Rs, @aa:8
Instruction Branch
Stack
Fetch
Addr. Read Operation
I
J
K
1
1
1
2
2
2
1
2
1
2
1
2
1
1
1
1
2
3
5
2
3
4
1
1
1
2
4
1
1
2
3
1
2
4
1
1
Byte Data
Access
L
1
1
1
1
1
1
1
1
1
1
1
1
Word Data
Access
M
Internal
Operation
N
2
2
2
1
1
1
1
2
1
1
2
2
Rev. 3.00 May 15, 2007 Page 467 of 516
REJ09B0152-0300