HD64F38602R Datasheet, PDF (292/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 14 Serial Communication Interface 3 (SCI3, IrDA)
Start transmission
Set SPC3 bit in SPCR to 1
[1]
Read TDRE flag in SSR
No
TDRE = 1
Yes
Write transmit data to TDR
Yes
[2]
All data transmitted?
No
Read TEND flag in SSR
No
TEND = 1
Yes
No
[3]
Break output?
Yes
Clear PDR to 0 and set PCR to 1
[1] Read SSR and check that the TDRE flag
is set to 1, then write transmit data to
TDR. When data is written to TDR, the
TDRE flag is automatically cleared to 0.
(After the TE bit is set to 1, one frame of
1 is output, then transmission is
possible.)
[2] To continue serial transmission, read 1
from the TDRE flag to confirm that
writing is possible, then write data to
TDR. When data is written to TDR, the
TDRE flag is automatically cleared to 0.
[3] To output a break in serial transmission,
after setting PCR to 1 and PDR to 0,
clear the SPC3 bit in SPCR and the TE
bit in SCR to 0.
Note: * When the SPC3 bit in SPCR is cleared to 0,
the pin functions as an I/O port.
Clear SPC3 bit in SPCR and
TE bit in SCR to 0*
<End>
Figure 14.6 Sample Serial Transmission Flowchart (Asynchronous Mode)
Rev. 3.00 May 15, 2007 Page 260 of 516
REJ09B0152-0300