HD64F38602R Datasheet, PDF (29/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Tables
Section 1 Overview
Table 1.1 Pin Functions ............................................................................................................ 4
Section 2 CPU
Table 2.1 Operation Notation ................................................................................................. 16
Table 2.2 Data Transfer Instructions....................................................................................... 17
Table 2.3 Arithmetic Operations Instructions (1) ................................................................... 18
Table 2.3 Arithmetic Operations Instructions (2) ................................................................... 19
Table 2.4 Logic Operations Instructions................................................................................. 20
Table 2.5 Shift Instructions..................................................................................................... 20
Table 2.6 Bit Manipulation Instructions (1)............................................................................ 21
Table 2.6 Bit Manipulation Instructions (2)............................................................................ 22
Table 2.7 Branch Instructions ................................................................................................. 23
Table 2.8 System Control Instructions.................................................................................... 24
Table 2.9 Block Data Transfer Instructions ............................................................................ 25
Table 2.10 Addressing Modes .................................................................................................. 27
Table 2.11 Absolute Address Access Ranges ........................................................................... 29
Table 2.12 Effective Address Calculation (1)........................................................................... 30
Table 2.12 Effective Address Calculation (2)........................................................................... 31
Section 3 Exception Handling
Table 3.1 Exception Sources and Vector Address .................................................................. 42
Table 3.2 Reset Sources.......................................................................................................... 44
Table 3.3 Pin Configuration.................................................................................................... 46
Table 3.4 Interrupt Wait States ............................................................................................... 57
Section 4 Clock Pulse Generators
Table 4.1 Methods for Selecting System Clock Oscillator and On-Chip Oscillator............... 67
Section 5 Power-Down Modes
Table 5.1 Operating Frequency and Waiting Time................................................................. 79
Table 5.2 Transition Mode after SLEEP Instruction Execution and Interrupt Handling ........ 85
Table 5.3 Internal State in Each Operating Mode................................................................... 86
Section 6 ROM
Table 6.1 Setting Programming Modes ................................................................................ 104
Table 6.2 Boot Mode Operation ........................................................................................... 107
Table 6.3 System Clock Frequencies for which Automatic Adjustment of
LSI Bit Rate is Possible......................................................................................... 108
Table 6.4 Reprogramming Data Computation Table ............................................................ 111
Rev. 3.00 May 15, 2007 Page xxix of xxxii