HD64F38602R Datasheet, PDF (299/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 14 Serial Communication Interface 3 (SCI3, IrDA)
Start transmission
Set SPC3 bit in SPCR to 1
[1] Read SSR and check that the TDRE flag is
set to 1, then write transmit data to TDR.
[1]
Read TDRE flag in SSR
When data is written to TDR, the TDRE flag
is automatically cleared to 0. When clock
output is selected and data is written to
TDRE = 1
No
TDR, clocks are output to start the data
transmission.
[2] To continue serial transmission, be sure to
Yes
read 1 from the TDRE flag to confirm that
writing is possible, then write data to TDR.
Write transmit data to TDR
When data is written to TDR, the TDRE flag
is automatically cleared to 0.
Yes
[2]
All data transmitted?
No
Read TEND flag in SSR
No
TEND = 1
Yes
Clear TE bit in SCR to 0
<End>
Figure 14.11 Sample Serial Transmission Flowchart (Clock Synchronous Mode)
Rev. 3.00 May 15, 2007 Page 267 of 518
REJ09B0152-0300