HD64F38602R Datasheet, PDF (324/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 15 Synchronous Serial Communication Unit (SSU)
Initial
Bit
Bit Name Value R/W Description
2
TDRE
1
R/(W)* Transmit Data Empty
[Setting conditions]
• When the TE bit in SSER is 0
• When data transfer is performed from SSTDR to
SSTRSR and data can be written in SSTDR
[Clearing conditions]
• When 0 is written to this bit after reading 1
• When data is written in SSTDR
1
RDRF
0
R/(W)* Receive Data Register Full
[Setting condition]
• When serial reception is completed normally and
receive data is transferred from SSTRSR to SSRDR
[Clearing conditions]
• When 0 is written to this bit after reading 1
• When data is read from SSRDR
0
CE
0
R/(W)* Conflict Error Flag
[Setting conditions]
• When serial communication is started while SSUMS
= 1 and MSS =1, the SCS pin input is low
• When the SCS pin level changes from low to high
during transfer while SSUMS = 1 and MSS = 0
[Clearing condition]
• When 0 is written to this bit after reading 1
Note: * Only 0 can be written to clear the flag.
Rev. 3.00 May 15, 2007 Page 292 of 516
REJ09B0152-0300