HD64F38602R Datasheet, PDF (175/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 8 I/O Ports
Initial
Bit
Bit Name Value R/W Description
0
SCINV0 0
R/W RXD3/IrRXD Pin Input Data Inversion Switch
Specifies whether the logic level of input data of the
RXD3/IrRXD pin is to be inverted or not.
0: RXD3/IrRXD input data is not inverted
1: RXD3/IrRXD input data is inverted
Note:
When the serial port control register is modified, the data being input or output up to that
point is inverted immediately after the modification, and an invalid data change is input or
output. When modifying the serial port control register, modification must be made in a state
in which data changes are invalidated.
8.6.2 Port Function Control Register (PFCR)
PFCR changes the SSU pin assignments, and assigns the IRQ0 and IRQ1 input pins to other ports.
Bit
7 to 5
Initial
Bit Name Value R/W

All 0 
4
SSUS
0
R/W
3
IRQ1S1 0
R/W
2
IRQ1S0 0
R/W
1
IRQ0S1 0
R/W
0
IRQ0S0 0
R/W
Description
Reserved
These bits are always read as 0. These bits cannot be
modified.
SSU Pin Select
Changes the SSU pin assignments.
0: SSI is assigned to P93
SSO is assigned to P92
SSCK is assigned to P91
SCS is assigned to P90
1: SSI is assigned to P90
SSO is assigned to P91
SSCK is assigned to P92
SCS is assigned to P93
IRQ1 Select 1, 0
00: IRQ1 is input from PB1
01: IRQ1 is input from P93
10: IRQ1 is input from P11
11: Setting prohibited
IRQ0 Select 1, 0
00: IRQ0 is input from PB0
01: IRQ0 is input from P92
10: IRQ0 is input from P30
11: Setting prohibited
Rev. 3.00 May 15, 2007 Page 143 of 516
REJ09B0152-0300