HD64F38602R Datasheet, PDF (397/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 18 Comparators
Initial
Bit
Bit Name Value R/W Description
1
CDR1
*²
R
[Setting condition]
COMP1 pin > Reference voltage
[Clearing condition]
COMP1 pin ≤ Reference voltage
0
CDR0
*²
R
[Setting condition]
COMP0 pin > Reference voltage
[Clearing condition]
COMP0 pin ≤ Reference voltage
Notes: 1. Only 0 can be written to clear the flag.
2. Depends on the pin state and reference voltage.
18.4 Operation
18.4.1 Operation Sequence
The operation sequence of a comparator is as follows:
1. When using VCref, the pins to be used are enabled by the corresponding port mode registers.
For details, see section 8, I/O Ports.
2. Select the reference voltage (CMR setting: internal power supply or VCref).
When the internal power supply is selected as the reference voltage, select the hysteresis
characteristics (CMLS setting) and reference voltage (CRS3 to CRS0 setting).
3. Set the comparator enable bit (CME).
4. After setting CME, wait for the conversion time (see section 21, Electrical Characteristics) so
that the comparator becomes stabilized.
5. Read from CDR.
6. After reading the CMF flag, write 0 to it (reading the CMF flag can be performed
simultaneously with step 5).
7. If an interrupt is to be generated, set the comparator interrupt enable bit (CMIE).
Note: Steps 2 and 3 can be done simultaneously by writing to the entire register.
Rev. 3.00 May 15, 2007 Page 365 of 518
REJ09B0152-0300