HD64F38602R Datasheet, PDF (264/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 14 Serial Communication Interface 3 (SCI3, IrDA)
Clock synchronous mode
• Data length: 8 bits
• Receive error detection: Overrun errors detected
Note: When using serial communication interface 3, the system clock oscillator or subclock
oscillator must be used.
Figure 14.1 shows a block diagram of the SCI3.
TXD3
RXD3
SCK3
External clock
Baud rate generator
Internal clock
(φ/64, φ/16, φw, φ)
Clock
BRC3
Transmit/receive
control circuit
TSR3
BRR3
SEMR
SMR3
SCR3
SSR3
TDR3
SPCR
RSR3
RDR3
IrCR
[Legend]
RSR3: Receive shift register 3
RDR3: Receive data register 3
TSR3: Transmit shift register 3
TDR3: Transmit data register 3
SMR3: Serial mode register 3
SCR3: Serial control register 3
SSR3: Serial status register 3
BRR3: Bit rate register 3
BRC3: Bit rate counter 3
SPCR: Serial port control register
IrCR: IrDA control register
SEMR: Serial extended mode register
Figure 14.1 Block Diagram of SCI3
Interrupt request
(TEI3, TXI3, RXI3, ERI3)
Rev. 3.00 May 15, 2007 Page 232 of 516
REJ09B0152-0300