HD64F38602R Datasheet, PDF (356/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 16 I²C Bus Interface 2 (IIC2)
Initial
Bit Bit Name Value R/W Description
4
NACKF
0
R/(W)* No Acknowledge Detection Flag
[Setting condition]
• When no acknowledge is detected from the receive
device in transmission while the ACKE bit in ICIER
is 1
[Clearing condition]
• When 0 is written in NACKF after reading NACKF =
1
3
STOP
0
R/(W)* Stop Condition Detection Flag
[Setting conditions]
• In master mode, when a stop condition is detected
after the completion of frame transfer
• In slave mode, when a stop condition is detected,
after the slave address of the first byte, following the
general call and the detection of the start condition,
matches the address set in SAR
[Clearing condition]
• When 0 is written in STOP after reading STOP = 1
Rev. 3.00 May 15, 2007 Page 324 of 516
REJ09B0152-0300