HD64F38602R Datasheet, PDF (494/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Appendix
Table A.3 Number of Cycles in Each Instruction
Execution Status
(Instruction Cycle)
On-Chip Memory
Access Location
On-Chip Peripheral Module
Instruction fetch
S
2
—
I
Branch address read S_J
Stack operation
S
K
Byte data access
S_L
2 or 3*
Word data access
S_M
—
Internal operation
S_N
1
Note: * Depends on which on-chip peripheral module is accessed. See section 20.1, Register
Addresses (Address Order).
Rev. 3.00 May 15, 2007 Page 462 of 516
REJ09B0152-0300