HD64F38602R Datasheet, PDF (249/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 13 Asynchronous Event Counter (AEC)
13.3.2 Event Counter PWM Data Register (ECPWDR)
ECPWDR controls data of the event counter PWM waveform generator.
Initial
Bit Bit Name Value R/W Description
15
ECPWDR15 0
14
ECPWDR14 0
13
ECPWDR13 0
12
ECPWDR12 0
11
ECPWDR11 0
10
ECPWDR10 0
9
ECPWDR9 0
8
ECPWDR8 0
W
Data Control of Event Counter PWM Waveform
W
Generator
W
When the ECPWME bit in AEGSR is 1, the event
counter PWM is operating and therefore ECPWDR
W
should not be modified.
W
When changing the conversion cycle, the event
counter PWM must be halted by clearing the ECPWME
W
bit in AEGSR to 0 before modifying ECPWDR.
W
The read value is undefined.
W
7
ECPWDR7 0
W
6
ECPWDR6 0
W
5
ECPWDR5 0
W
4
ECPWDR4 0
W
3
ECPWDR3 0
W
2
ECPWDR2 0
W
1
ECPWDR1 0
W
0
ECPWDR0 0
W
Rev. 3.00 May 15, 2007 Page 217 of 516
REJ09B0152-0300