HD64F38602R Datasheet, PDF (267/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 14 Serial Communication Interface 3 (SCI3, IrDA)
14.3.5 Serial Mode Register (SMR)
SMR sets the SCI3’s serial communication format and selects the clock source for the on-chip
baud rate generator.
SMR is initialized to H'00 by a reset or in standby mode, watch mode, or module standby mode.
Initial
Bit
Bit Name Value R/W Description
7
COM
0
R/W Communication Mode
0: Asynchronous mode
1: Clock synchronous mode
6
CHR
0
R/W Character Length (enabled only in asynchronous mode)
0: Selects 8 or 5 bits as the data length.
1: Selects 7 or 5 bits as the data length.
When 7-bit data is selected. the MSB (bit 7) in TDR is
not transmitted. To select 5 bits as the data length, set
1 to both the PE and MP bits. The three most significant
bits (bits 7, 6, and 5) in TDR are not transmitted. In
clock synchronous mode, the data length is fixed to 8
bits regardless of the CHR bit setting.
5
PE
0
R/W Parity Enable (enabled only in asynchronous mode)
When this bit is set to 1, the parity bit is added to
transmit data before transmission, and the parity bit is
checked in reception. In clock synchronous mode,
parity bit addition and checking is not performed
regardless of the PE bit setting.
Rev. 3.00 May 15, 2007 Page 235 of 518
REJ09B0152-0300