HD64F38602R Datasheet, PDF (519/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Appendix
B.3 Port 9 Related Register Settings and Pin Functions
Table B.1 Port 9 Related Register Settings and Pin Functions
SSU Setting
SSUMS BIDE MSS
TE
0
*
(Clock
synchro-
nous)
0
0
(Slave)
IIC2
Setting
RE
ICE
1
(Receive)
0
(IIC2 not
used)
1
0
(Transmit)
0
(IIC2 not
used)
1
(Transmit)
1
(Receive)
0
(IIC2 not
used)
PFCR Setting
Pin Functions
IRQ1S1, IRQ0S1,
SSUS IRQ1S0 IRQ0S0 P93
P92
P91
P90
0
Other then Other
SSI input P92 I/O SSCK P90 I/O
01
then 01
input
Other then 01
01
SSI input IRQ0N
input
SSCK
input
P90 I/O
1
Other then Other
P93 I/O SSCK P91 I/O SSI input
01
then 01
input
01
Other
IRQ1N SSCK P91 I/O SSI input
then 01 input
input
0
Other then Other
P93 I/O SSO
SSCK P90 I/O
01
then 01
output input
01
Other
IRQ1N SSO
SSCK P90 I/O
then 01 input
output input
1
Other then Other
P93 I/O SSCK SSO
P90 I/O
01
then 01
input
output
01
Other
IRQ1N SSCK SSO
P90 I/O
then 01 input
input
output
0
Other then Other
SSI input SSO
SSCK P90 I/O
01
then 01
output input
1
Other then Other
P93 I/O SSCK SSO
SSI input
01
then 01
input
output
01
Other
IRQ1N SSCK SSO
SSI input
then 01 input
input
output
Rev. 3.00 May 15, 2007 Page 487 of 516
REJ09B0152-0300