HD64F38602R Datasheet, PDF (479/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

2. Arithmetic Instructions
Addressing Mode and
Instruction Length (bytes)
Mnemonic
Appendix
Operation
No. of
States*¹
Condition Code
ADD ADD.B #xx:8, Rd
ADD.B Rs, Rd
ADD.W #xx:16, Rd
ADD.W Rs, Rd
ADD.L #xx:32, ERd
ADD.L ERs, ERd
ADDX ADDX.B #xx:8, Rd
ADDX.B Rs, Rd
ADDS ADDS.L #1, ERd
ADDS.L #2, ERd
ADDS.L #4, ERd
INC INC.B Rd
INC.W #1, Rd
INC.W #2, Rd
INC.L #1, ERd
INC.L #2, ERd
DAA DAA Rd
SUB SUB.B Rs, Rd
SUB.W #xx:16, Rd
SUB.W Rs, Rd
SUB.L #xx:32, ERd
SUB.L ERs, ERd
SUBX SUBX.B #xx:8, Rd
SUBX.B Rs, Rd
SUBS SUBS.L #1, ERd
SUBS.L #2, ERd
SUBS.L #4, ERd
DEC DEC.B Rd
DEC.W #1, Rd
DEC.W #2, Rd
B2
B
2
W4
W
2
L6
L
2
B2
B
2
L
2
L
2
L
2
B
2
W
2
W
2
L
2
L
2
B
2
B
2
W4
W
2
L6
L
2
B2
B
2
L
2
L
2
L
2
B
2
W
2
W
2
I HNZVC
Rd8+#xx:8 → Rd8
—
2
Rd8+Rs8 → Rd8
—
2
Rd16+#xx:16 → Rd16
— (1)
4
Rd16+Rs16 → Rd16
— (1)
2
ERd32+#xx:32 →
— (2)
6
ERd32
ERd32+ERs32 →
— (2)
2
ERd32
Rd8+#xx:8 +C → Rd8
Rd8+Rs8 +C → Rd8
ERd32+1 → ERd32
ERd32+2 → ERd32
ERd32+4 → ERd32
Rd8+1 → Rd8
Rd16+1 → Rd16
Rd16+2 → Rd16
ERd32+1 → ERd32
ERd32+2 → ERd32
Rd8 decimal adjust
→ Rd8
—
(3)
2
—
(3)
2
——————
2
——————
2
——————
2
——
—
2
——
—
2
——
—
2
——
—
2
——
—
2
—*
*
2
Rd8–Rs8 → Rd8
—
2
Rd16–#xx:16 → Rd16
— (1)
4
Rd16–Rs16 → Rd16
— (1)
2
ERd32–#xx:32 → ERd32 — (2)
6
ERd32–ERs32 → ERd32 — (2)
2
Rd8–#xx:8–C → Rd8
—
(3)
2
Rd8–Rs8–C → Rd8
—
(3)
2
ERd32–1 → ERd32
——————
2
ERd32–2 → ERd32
——————
2
ERd32–4 → ERd32
——————
2
Rd8–1 → Rd8
——
—
2
Rd16–1 → Rd16
——
—
2
Rd16–2 → Rd16
——
—
2
Rev. 3.00 May 15, 2007 Page 447 of 516
REJ09B0152-0300