HD64F38602R Datasheet, PDF (116/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 5 Power-Down Modes
Reset state
Program
halt state
Standby
mode
Program
execution state
SLEEP d
instruction
4
Active
(high-speed
mode)
d _SLEEP
instruction
g
f SLEEP
SLEEP ^instruction
instruction
4
SLEEP
instruction ^a
3
a
SiLnEstEruPction
e
SLEEP
1
instruction
e
1
Watch
mode
e
SLEEP
instruction
1
Active
(medium-speed)
mode
SLEEP b
instruction
3
h
SLEEP
instruction
j
SLEEP
instruction
i1
SLEEP
instruction
i2
SLEEP
instruction
Subactive
mode
SLEEP _c
instruction
2
Program
halt state
Sleep
(high-speed)
mode
b
Sleep
(medium-speed)
mode
Subsleep
mode
: Transition is made after exception handling
is executed.
Power-down modes
Mode Transition Conditions (1)
Mode Transition Conditions (2)
LSON MSON SSBY TMA3 DTON
Interrupt Sources
a
0
0
0
x
0
b
0
1
0
x
0
c
1
x
0
1
0
d
0
x
1
0
0
e
x
x
1
1
0
f
0
0
0
x
1
g
0
1
0
x
1
1 NMI, IRQ0, IRQ1, IRQAEC, COMP, RTC, WDT,
AEC, and timer B1
2 All interrupts except IIC2
3 All interrupts
4 NMI, IRQ0, IRQ1, IRQAEC, COMP, WDT, and
AEC
h
0
1
1
1
1
i1
1
x
1
1
1
i2
1
1
1
1
1
j
0
0
1
1
1
x: Don't care
Note: A transition between different modes cannot be made to occur simply because an interrupt
request is generated. Make sure that interrupt handling is accepted.
Figure 5.1 Mode Transition Diagram
Rev. 3.00 May 15, 2007 Page 84 of 516
REJ09B0152-0300