HD64F38602R Datasheet, PDF (500/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Appendix
Instruction Mnemonic
MOV
MOV.B Rs, @aa:16
MOV.B Rs, @aa:24
MOV.W #xx:16, Rd
MOV.W Rs, Rd
MOV.W @ERs, Rd
MOV.W @(d:16,ERs), Rd
MOV.W @(d:24,ERs), Rd
MOV.W @ERs+, Rd
MOV.W @aa:16, Rd
MOV.W @aa:24, Rd
MOV.W Rs, @ERd
MOV.W Rs, @(d:16,ERd)
MOV.W Rs, @(d:24,ERd)
MOV.W Rs, @-ERd
MOV.W Rs, @aa:16
MOV.W Rs, @aa:24
MOV.L #xx:32, ERd
MOV.L ERs, ERd
MOV.L @ERs, ERd
MOV.L @(d:16,ERs), ERd
MOV.L @(d:24,ERs), ERd
MOV.L @ERs+, ERd
MOV.L @aa:16, ERd
MOV.L @aa:24, ERd
MOV.L ERs,@ERd
MOV.L ERs, @(d:16,ERd)
MOV.L ERs, @(d:24,ERd)
MOV.L ERs, @-ERd
MOV.L ERs, @aa:16
MOV.L ERs, @aa:24
MOVFPE
MOVTPE
MOVFPE @aa:16, Rd*²
MOVTPE Rs,@aa:16*²
Instruction Branch
Stack
Fetch
Addr. Read Operation
I
J
K
2
3
2
1
1
2
4
1
2
3
1
2
4
1
2
3
3
1
2
3
5
2
3
4
2
3
5
2
3
4
2
2
Byte Data
Access
L
1
1
1
1
Word Data Internal
Access
Operation
M
N
1
1
1
1
2
1
1
1
1
1
1
2
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Rev. 3.00 May 15, 2007 Page 468 of 516
REJ09B0152-0300