HD64F38602R Datasheet, PDF (207/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 10 Timer W
10.5 Operation Timing
10.5.1 TCNT Count Timing
Figure 10.14 shows the TCNT count timing when the internal clock source is selected. Figure
10.15 shows the timing when the external clock source is selected. The pulse width of the external
clock signal must be at least two system clock (φ) cycles; shorter pulses will not be counted
correctly.
φ
Internal
clock
Rising edge
TCNT input
clock
TCNT
N
N+1
N+2
Figure 10.14 Count Timing for Internal Clock Source
φ
External
clock
TCNT input
clock
TCNT
Rising edge
N
Rising edge
N+1
N+2
Figure 10.15 Count Timing for External Clock Source
Rev. 3.00 May 15, 2007 Page 175 of 518
REJ09B0152-0300