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HD64F38602R Datasheet, PDF (33/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer
Section 1 Overview
Section 1 Overview
1.1 Features
• High-speed H8/300H central processing unit with an internal 16-bit architecture
 Upward-compatible with H8/300 CPU on an object level
 Sixteen 16-bit general registers
 62 basic instructions
• Various peripheral functions
 RTC (can be used as a free-running counter)
 Asynchronous event counter (AEC)
 Timer B1
 Timer W
 Watchdog timer
 SCI (asynchronous or clock synchronous serial communication interface)
 SSU (synchronous serial communication unit)*
 I2C bus interface (conforms to the I2C bus interface format that is advocated by Philips
Electronics)*
 10-bit A/D converter
 Comparators
Note: * SSU and IIC2 are shared.
• On-chip memory
Product Classification
Model
ROM
Flash memory version
(F-ZTATTM version)
H8/38602RF
HD64F38602R
16 Kbytes
Masked ROM version
H8/38602R
HD64338602R
16 Kbytes
H8/38600R
HD64338600R
8 Kbytes
Note: F-ZTATTM is a trademark of Renesas Technology Corp.
RAM
1 Kbyte
1 Kbyte
512 bytes
• General I/O ports
 I/O pins: 13 I/O pins, including three large current ports (IOL = 15 mA, @VOL = 1.0 V)
 Input-only pins: 6 input pins (also used as analog input pins)
• Supports various power-down states
Rev. 3.00 May 15, 2007 Page 1 of 516
REJ09B0152-0300