HD64F38602R Datasheet, PDF (338/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 15 Synchronous Serial Communication Unit (SSU)
(1) When CPOS = 0 and CPHS = 0:
SCS
(output)
SSCK
(Hi-Z)
SSO
TDRE
Bit 7
Bit 6
One frame
TEND
LSI operation TXI generated
User
Write data
processing in SSTDR
Write data
in SSTDR
(2) When CPOS = 0 and CPHS = 1:
SCS
(output)
SSCK
Bit 0
Bit 7
Bit 6
One frame
Bit 0
TXI generated
TEI generated
(Hi-Z)
SSO
TDRE
Bit 7
Bit 6
One frame
Bit 0
Bit 7
Bit 6
One frame
Bit 0
TEND
LSI operation
TXI generated
TXI generated
TEI generated
User
Write data
processing in SSTDR
Write data
in SSTDR
Figure 15.11 Example of Operation in Data Transmission (MSS = 1)
Rev. 3.00 May 15, 2007 Page 306 of 516
REJ09B0152-0300