HD64F38602R Datasheet, PDF (226/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 11 Realtime Clock (RTC)
11.3.8 RTC Interrupt Flag Register (RTCFLG)
RTCFLG sets the corresponding flag when an interrupt occurs. Each flag is not cleared
automatically even if the interrupt is accepted. To clear the flag, 0 should be written to the flag.
Initial
Bit
Bit Name Value R/W Description
7
FOIFG
—/(0)*¹ R/(W)*² [Setting condition]
When a free running counter overflows
[Clearing condition]
0 is written to FOIFG when FOIFG = 1
6
WKIFG —/(0)*¹ R/(W)*² [Setting condition]
When a week periodic interrupt occurs
[Clearing condition]
0 is written to WKIFG when WKIFG = 1
5
DYIFG
—/(0)*¹ R/(W)*² [Setting condition]
When a day periodic interrupt occurs
[Clearing condition]
0 is written to DYIFG when DYIFG = 1
4
HRIFG —/(0)*¹ R/(W)*² [Setting condition]
When an hour periodic interrupt occurs
[Clearing condition]
0 is written to HRIFG when HRIFG = 1
3
MNIFG —/(0)*¹ R/(W)*² [Setting condition]
When a minute periodic interrupt occurs
[Clearing condition]
0 is written to MNIFG when MNIFG = 1
2
1SEIFG —/(0)*¹ R/(W)*² [Setting condition]
When a one-second periodic interrupt occurs
[Clearing condition]
0 is written to 1SEIFG when 1SEIFG = 1
Rev. 3.00 May 15, 2007 Page 194 of 516
REJ09B0152-0300