HD64F38602R Datasheet, PDF (22/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Figure 4.7 Pin Connection when not Using Subclock .................................................................. 69
Figure 4.8 Pin Connection when Inputting External Clock .......................................................... 70
Figure 4.9 Example of Crystal and Ceramic Resonator Assignment............................................ 72
Figure 4.10 Negative Resistance Measurement and Circuit Modification Suggestions ............... 73
Figure 4.11 Example of Incorrect Board Design .......................................................................... 74
Figure 4.12 Oscillation Stabilization Wait Time .......................................................................... 75
Section 5 Power-Down Modes
Figure 5.1 Mode Transition Diagram ........................................................................................... 84
Figure 5.2 Standby Mode Transition and Pin States..................................................................... 97
Figure 5.3 External Input Signal Capture when Signal Changes
before/after Standby Mode or Watch Mode ............................................................... 98
Section 6 ROM
Figure 6.1 Flash Memory Block Configuration.......................................................................... 100
Figure 6.2 Programming/Erasing Flowchart Example in User Program Mode.......................... 108
Figure 6.3 Program/Program-Verify Flowchart ......................................................................... 110
Figure 6.4 Erase/Erase-Verify Flowchart ................................................................................... 113
Figure 6.5 Module Standby Mode Setting.................................................................................. 116
Section 8 I/O Ports
Figure 8.1 Port 1 Pin Configuration............................................................................................ 119
Figure 8.2 Port 3 Pin Configuration............................................................................................ 124
Figure 8.3 Port 8 Pin Configuration............................................................................................ 128
Figure 8.4 Port 9 Pin Configuration............................................................................................ 132
Figure 8.5 Port B Pin Configuration........................................................................................... 138
Figure 8.6 Input/Output Data Inversion Function....................................................................... 142
Section 9 Timer B1
Figure 9.1 Block Diagram of Timer B1...................................................................................... 145
Figure 9.2 Timer B1 Initial Setting Flow ................................................................................... 148
Figure 9.3 Processing Flow When Changing Setting during Counter Operation ....................... 149
Section 10 Timer W
Figure 10.1 Timer W Block Diagram......................................................................................... 155
Figure 10.2 Free-Running Counter Operation ............................................................................ 166
Figure 10.3 Periodic Counter Operation..................................................................................... 167
Figure 10.4 0 and 1 Output Example (TOA = 0, TOB = 1)........................................................ 167
Figure 10.5 Toggle Output Example (TOA = 0, TOB = 1) ........................................................ 168
Figure 10.6 Toggle Output Example (TOA = 0, TOB = 1) ........................................................ 168
Figure 10.7 Input Capture Operating Example........................................................................... 169
Figure 10.8 Buffer Operation Example (Input Capture)............................................................. 170
Figure 10.9 PWM Mode Example (1) ........................................................................................ 171
Rev. 3.00 May 15, 2007 Page xxii of xxxii