HD64F38602R Datasheet, PDF (478/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Appendix
Mnemonic
Addressing Mode and
Instruction Length (bytes)
Operation
No. of
States*¹
Condition Code
MOV MOV.W Rs, @–ERd
W
2
MOV.W Rs, @aa:16
MOV.W Rs, @aa:24
MOV.L #xx:32, ERd
MOV.L ERs, ERd
MOV.L @ERs, ERd
MOV.L @(d:16, ERs), ERd
MOV.L @(d:24, ERs), ERd
MOV.L @ERs+, ERd
W
4
W
6
L6
L
2
L
4
L
6
L
10
L
4
MOV.L @aa:16, ERd
L
MOV.L @aa:24, ERd
L
MOV.L ERs, @ERd
L
MOV.L ERs, @(d:16, ERd) L
MOV.L ERs, @(d:24, ERd) L
MOV.L ERs, @–ERd
L
6
8
4
6
10
4
MOV.L ERs, @aa:16
L
6
MOV.L ERs, @aa:24
L
8
POP POP.W Rn
W
POP.L ERn
L
PUSH PUSH.W Rn
W
PUSH.L ERn
L
MOVFPE MOVFPE @aa:16, Rd
B
4
MOVTPE MOVTPE Rs, @aa:16
B
4
ERd32–2 → ERd32
Rs16 → @ERd
Rs16 → @aa:16
Rs16 → @aa:24
#xx:32 → ERd32
ERs32 → ERd32
@ERs → ERd32
@(d:16, ERs) → ERd32
@(d:24, ERs) → ERd32
@ERs → ERd32
ERs32+4 → ERs32
@aa:16 → ERd32
@aa:24 → ERd32
ERs32 → @ERd
ERs32 → @(d:16, ERd)
ERs32 → @(d:24, ERd)
ERd32–4 → ERd32
ERs32 → @ERd
ERs32 → @aa:16
ERs32 → @aa:24
2 @SP → Rn16
SP+2 → SP
4 @SP → ERn32
SP+4 → SP
2 SP–2 → SP
Rn16 → @SP
4 SP–4 → SP
ERn32 → @SP
Cannot be used in
this LSI
Cannot be used in
this LSI
I HNZVC
——
0—
6
——
——
——
——
——
——
——
——
0—
6
0—
8
0—
6
0—
2
0—
8
0 — 10
0 — 14
0 — 10
——
——
——
——
——
——
0 — 10
0 — 12
0—
8
0 — 10
0 — 14
0 — 10
——
——
——
0 — 10
0 — 12
0—
6
——
0 — 10
——
0—
6
——
0 — 10
Cannot be used in
this LSI
Cannot be used in
this LSI
Rev. 3.00 May 15, 2007 Page 446 of 516
REJ09B0152-0300