HD64F38602R Datasheet, PDF (138/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 6 ROM
6. Before branching to the programming control program, this LSI terminates transfer operations
by SCI3 (by clearing the RE and TE bits in SCR3 to 0), however the adjusted bit rate value
remains set in BRR. Therefore, the programming control program can still use it for
transferring program data or verify data to the host. The TXD pin is driven high (PCR32 = 1,
P32 = 1). The contents of the CPU general registers are undefined immediately after branching
to the programming control program. These registers must be initialized at the beginning of the
programming control program because the stack pointer (SP), in particular, is used implicitly
in subroutine calls, etc.
7. The boot mode can be released by a reset. Hold the reset signal low at least 20 states and then
set the NMI pin before negating the reset signal. The boot mode is also released when a WDT
overflow occurs.
8. Do not change the TEST pin and NMI pin input levels in boot mode.
Rev. 3.00 May 15, 2007 Page 106 of 516
REJ09B0152-0300