HD64F38602R Datasheet, PDF (133/552 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 6 ROM
6.2 Register Descriptions
The flash memory has the following registers.
• Flash memory control register 1 (FLMCR1)
• Flash memory control register 2 (FLMCR2)
• Erase block register 1 (EBR1)
• Flash memory power control register (FLPWCR)
• Flash memory enable register (FENR)
6.2.1 Flash Memory Control Register 1 (FLMCR1)
FLMCR1 is a register that makes the flash memory enter the programming mode, programming-
verifying mode, erasing mode, or erasing-verifying mode. For details on register setting, refer to
section 6.4, Flash Memory Programming/Erasure.
Initial
Bit
Bit Name Value R/W Description
7

0

Reserved
This bit is always read as 0.
6
SWE
0
R/W Software Write Enable
When this bit is set to 1, flash memory
programming/erasure is enabled. When this bit is cleared
to 0, other FLMCR1 register bits and all EBR1 bits cannot
be set.
5
ESU
0
R/W Erase Setup
When this bit is set to 1, the flash memory enters to the
erasure setup state. When it is cleared to 0, the erasure
setup state is released. Set this bit to 1 before setting the
E bit in FLMCR1 to 1.
4
PSU
0
R/W Program Setup
When this bit is set to 1, the flash memory enters to the
programming setup state. When it is cleared to 0, the
programming setup state is released. Set this bit to 1
before setting the P bit in FLMCR1 to 1.
Rev. 3.00 May 15, 2007 Page 101 of 518
REJ09B0152-0300