SH7619_09 Datasheet, PDF (846/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Item
Page Revision (See Manual for Details)
25.2 Power-On and Power-Off 731 Amended
Order
Table 25.7 Clock Timing
Vcc/2
t_PWD
Operation stopped
max 0.3V
735,
736
Amended
Item
Symbol Min. Max. Unit.
CK_PHY clock input
frequency
f_CKPHY
25 −100 25 +100 MHz
ppm*¹ ppm*¹
CK_PHY clock input
cycle time
T_CKPHYcyc
39.996 40.004 ns
CK_PHY clock input t_CKPHYL
12

ns
low pulse width
RES assert time
t_RESW
20

t *2
bcyc
Notes: 1. Error margin means frequency tolerance
(reference value). Recommending under 100 ps
of peak to peak jitter.
2. t_bcyc indicates the period of the external bus clock
(Bφ).
Rev. 6.00 Jul. 15, 2009 Page 806 of 816
REJ09B0237-0600