SH7619_09 Datasheet, PDF (831/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Appendix
Z:
High-impedance
P:
Input or output depending on the register setting
Notes: 1. Depends on the clock mode (setting of pins MD2 to MD0).
2. Depends on the HIZCNT bit in CMNCR.
3. High-impedance when HIFEBL = low
4. Depends on the HIZMEM bit in CMNCR.
5. Depends on the HIZCNT bit in CMNCR or the CKOEN bit in FRQCR.
6. This pin becomes output state only when reading data from the H-UDI and retains high-
impedance state when the pin is not output state.
7. In all pins having the weak keeper circuit, even with the "Z" (meaning high-impedance)
description, each weak keeper circuit is always operating. For details on the weak
keeper circuit, see section 19.6, Usage Notes.
Rev. 6.00 Jul. 15, 2009 Page 791 of 816
REJ09B0237-0600