SH7619_09 Datasheet, PDF (626/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 19 I/O Ports
19.4 Port D
Port D of this LSI is an I/O port with eight pins as shown in figure 19.4.
Port D
PD0 (input/output)/IRQ0 (input)/TEND0 (output)
PD1 (input/output)/IRQ1 (input)/TEND1 (output)
PD2 (input/output)/IRQ2 (input)/TxD1 (output)/DREQ0 (input)
PD3 (input/output)/IRQ3 (input)/RxD1 (input)/DACK0(output)
PD4 (input/output)/IRQ4 (input)/SCK1 (input/output)
PD5 (input/output)/IRQ5 (input)/TxD2 (output)/DREQ1 (input)
PD6 (input/output)/IRQ6 (input)/RxD2 (input)/DACK0(output)
PD7 (input/output)/IRQ7 (input)/SCK2 (input/output)
Figure 19.4 Port D
19.4.1 Register Description
Port D is an 8-bit I/O port that has a following register. For details on the address of this register
and the states of this register in each processing state, see section 24, List of Registers.
• Port D data register L (PDDRL)
19.4.2 Port D Data Register L (PDDRL)
PDDRL is a 16-bit readable/writable register which stores data for port D. Bits PD7DR to PD0DR
correspond to pins PD7 to PD0. (Description of multiplexed functions is omitted.)
When the pin function is general output port, if the value is written to PDDRL, the value is output
from the pin; if PDDRL is read, the value written to the register is directly read regardless of the
pin state.
When the pin function is general input port, not the value of register but pin state is directly read if
PDDRL is read. Data can be written to PDDRL but no effect on the pin state. Table 19.4 shows
the reading/writing function of the port D data register L.
Rev. 6.00 Jul. 15, 2009 Page 586 of 816
REJ09B0237-0600