SH7619_09 Datasheet, PDF (800/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 25 Electrical Characteristics
CKIO
A25 to A0
A11*¹
Tr
Tc1
Tc2
Tc3
Tc4
t_AD1
t_AD1
t_AD1
t_AD1
t_AD1
t_AD1
Row
address
Column
address
Column
address
Column
address
Column
address
t_AD1
t_AD1
t_AD1
Write command
CSn
RD/WR
RAS
CAS
DQMxx
t_CSD1
t_RWD
t_RWD
t_RASD
t_RASD
t_CASD
t_DQMD
t_CSD1
t_RWD
t_CASD
t_DQMD
D15 to D0
BS
CKE
DACKn*²
t_DACD
t_WDD2
t_WDH2
t
BSD
(High)
t_WDD2
t_WDH2
t
BSD
t_DACD
Notes: * 1. Address pins connected to A10 in SDRAM
2. DACKn is the waveform when active low is selected.
Figure 25.27 Synchronous DRAM Burst Write Bus Cycle (Single Write × 4)
(Bank Active Mode: ACT + WRITE Commands, WTRCD = 0 Cycle,
TRWL = 0 Cycle)
Rev. 6.00 Jul. 15, 2009 Page 760 of 816
REJ09B0237-0600