SH7619_09 Datasheet, PDF (354/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 12 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Transmission task
1. Prepare multiple transmit descriptors.
Transmission starts.
2.
After setting the transmit descriptor,
set the TR bit in EDTRR to 1.
Next transmission task
No
generated?
Yes
End
Read the TACT bit of the corresponding
transmit descriptor.
No
3.
TACT = 0?
Yes
4. _{After setting the corresponding transmit}
5. descriptor, set the TR bit in EDTRR to 1.
Interrupt handler
Generation of EtherC/E-DMAC
interrupt
Save EESR and clear the bit
by writing a 1.
No
TC interrupt?
Yes
Make an OS service call to bring the
transmission task out of the waiting state.
Interrupt other than TC?
No
Yes
Interrupt processing for interrupts
other than TC
End
4. _{Place the transmission task in a waiting}
state by calling an OS service routine
with a timeout function.
Has the transmission
task left the waiting state
within the specified time?
Yes
TC: EESR frame transmission complete
: Processing added as the countermeasure for the problem
No
Timeout
6. _{Read the TACT bit of the corresponding}
transmit descriptor.
No
TACT = 0?
Yes
Figure 12.10 Method of Adding Timeout Processing
Rev. 6.00 Jul. 15, 2009 Page 314 of 816
REJ09B0237-0600