SH7619_09 Datasheet, PDF (776/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 25 Electrical Characteristics
Item
Symbol Min.
Max.
Unit. Reference Figures
Oscillation settling time 1
t_OSC2
10

ms
Figure 25.4
(leaving standby mode)
Oscillation settling time 2
t

10
ms
Figure 25.5
OSC3
(leaving standby mode)
PLL synchronize settling time t
PLL

100
µs
Figure 25.6
Notes: 1. Error margin means frequency tolerance (reference value). Recommending under 100
ps of peak to peak jitter.
2. t_bcyc indicates the period of the external bus clock (Bφ).
EXTAL* (input) 1/2 V_CC
t_EXH
t_EXcyc
t_EXL
V_IH
V_IH
V_IL
V_IL
t_EXf
V_IH
1/2 V_CC
t_EXr
Note: * When the clock is input to the EXTAL pin
Figure 25.1 External Clock Input Timing
CKIO (output)
1/2 V_CC
t_CKOH
V_OH
t_cyc
t_CKOL
V_OH
V_OL
V_OH
V_OL
1/2 V_CC
t_CKOf
t_CKOr
CK_PHY
t_CKPHYcyc
t_CKPHYH
t_CKPHYL
1/2 V_CC
V_OH
V_OH
V_OL
V_OH
V_OL
1/2 V_CC
t_CKPHYf
t_CKPHYr
Figure 25.2 CKIO Clock Output Timing and CK_PHY Clock Input Timing
Rev. 6.00 Jul. 15, 2009 Page 736 of 816
REJ09B0237-0600