SH7619_09 Datasheet, PDF (788/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 25 Electrical Characteristics
Th
T1
Twx
T2
Tf
CKIO
A25 to A0
CSn
WEn
RD/WR
Read
RD
D31 to D0
tAD1
tCSD1
tWED2
tRSD
tRWD1
tAD1
tCSD1
tWED2
tRSD
tRDS1
tRDH1
tRWD1
tRWD1
tRWD1
RD/WR
Write
D31 to D0
BS
DACKn*
TENDn
tWDD1
tBSD
tDACD
tBSD
tWTH1
tWTH1
tWDH1
tDACD
WAIT
tWTS1
tWTS1
Note : * DACKn and TENDn are the waveforms when active low is selected.
Figure 25.15 Byte Control SRAM Timing: SW = 1 Cycle, HW = 1 Cycle, One
Asynchronous External Wait Cycle, CSnWCR.BAS = 1 (WE-Controlled Write Cycle)
Rev. 6.00 Jul. 15, 2009 Page 748 of 816
REJ09B0237-0600