SH7619_09 Datasheet, PDF (705/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 22 Ethernet Physical Layer Transceiver (PHY)
22.11 Internal I/O Signals
The I/O signals interface the logic of the core PHY to other modules on this LSI. The input signals
can either be connected to other modules on the chip so that they can be connected to pins and
driven externally, or they can be tied high or low inside the chip to set the behavior of the core
PHY.
The following abbreviations are used:
• I: Input. Digital TTL levels.
• O: Output. Digital TTL levels.
• AI: Input. Analog levels.
• AO: Output. Analog levels.
• AI/O:
Input or Output. Analog levels.
Rev. 6.00 Jul. 15, 2009 Page 665 of 816
REJ09B0237-0600