SH7619_09 Datasheet, PDF (272/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 10 Power-Down Modes
WTCNT value
H'FF
Interrupt
request
WDT overflow and branch to
interrupt handling routine
Crystal oscillator settling
time and PLL synchronization time
Clear bit STBCR.STBY before
WTCNT reaches H'80. When
STBCR.STBY is cleared, WTCNT
halts automatically.
H'80
Time
Figure 10.1 Canceling Standby Mode with STBY Bit in STBCR
Canceling with Reset: Software standby mode is canceled by a power-on reset. Keep the RES pin
low until the clock oscillation settles. The internal clock will continue to be output to the CKIO
pin.
10.6 Module Standby Mode
10.6.1 Transition to Module Standby Mode
Setting the MSTP bits in the standby control registers (STBCR2 to STBCR4) to 1 halts the supply
of clocks to the corresponding on-chip peripheral modules. This function can be used to reduce the
power consumption in normal mode.
In module standby mode, the states of the external pins of the on-chip peripheral modules change
depending on the on-chip peripheral module and port settings. Almost all of the registers retain its
previous state.
10.6.2 Canceling Module Standby Function
The module standby function can be canceled by clearing the MSTP bits in STBCR2 to STBCR4
to 0, or by a power-on reset.
Rev. 6.00 Jul. 15, 2009 Page 232 of 816
REJ09B0237-0600