SH7619_09 Datasheet, PDF (56/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 1 Overview
Classifi-
cation Abbr.
I/O Pin Name Description
Physical
layer
trans-
ceiver
(PHY)
SPEED100
LINK
CRS
DUPLEX
Output SPEED100
signal
Output LINK signal
Output CRS signal
Output DUPLEX
signal
Monitor output pins indicating communication status
EXRES1
Input Reference
resistor
Connect to the PHY analog ground through a 12.4-kΩ
(accuracy: 1%) resistor.
TSTBUSA Input/ Test I/O
output
Input/output pin for testing the on-chip PHY. This pin should
be open.
Notes Fix all unused pins that have no weak keeper circuit to high or low level. Unused pins that
internally have weak keeper circuit need not to be fixed to high or low level. The weak
keeper is a circuit that is included in I/O pins and fixes the input pins to high or low when I/O
pins are not driven from outside.
* Magic Packet is the trademark of Advanced Micro Devices, Inc.
Rev. 6.00 Jul. 15, 2009 Page 16 of 816
REJ09B0237-0600