SH7619_09 Datasheet, PDF (153/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 7 Bus State Controller (BSC)
Table 7.2 Address Map 1 (CMNCR.MAP = 0)
Physical Address
Area
Memory to be Connected
Capacity
H'00000000 to H'03FFFFFF Area 0 Normal memory
64 Mbytes
H'04000000 to H'07FFFFFF Area 1 Reserved area*
64 Mbytes
H'08000000 to H'0BFFFFFF Area 2 Reserved area*
64 Mbytes
H'0C000000 to H'0FFFFFFF Area 3 Normal memory
64 Mbytes
Byte-selection SRAM
SDRAM
H'10000000 to H'13FFFFFF Area 4 Normal memory
64 Mbytes
Byte-selection SRAM
H'14000000 to H'15FFFFFF Area 5A Reserved area*
32 Mbytes
H'16000000 to H'17FFFFFF Area 5B Normal memory
32 Mbytes
Byte-selection SRAM
H'18000000 to H'19FFFFFF Area 6A Reserved area*
32 Mbytes
H'1A000000 to H'1BFFFFFF Area 6B Normal memory
32 Mbytes
Byte-selection SRAM
H'1C000000 to H'1FFFFFFF Area 7 Reserved area*
64 Mbytes
Note: * Do not access the reserved area. If the reserved area is accessed, the correct
operation cannot be guaranteed.
Table 7.3 Address Map 2 (CMNCR.MAP = 1)
Physical Address
H'00000000 to H'03FFFFFF
H'04000000 to H'07FFFFFF
H'08000000 to H'0BFFFFFF
H'0C000000 to H'0FFFFFFF
Area
Area 0
Area 1
Area 2
Area 3
H'10000000 to H'13FFFFFF Area 4
H'14000000 to H'17FFFFFF Area 5*²
Memory to be Connected
Normal memory
Reserved area*¹
Reserved area*¹
Normal memory
Byte-selection SRAM
SDRAM
Normal memory
Byte-selection SRAM
Normal memory
Byte-selection SRAM
PCMCIA
Capacity
64 Mbytes
64 Mbytes
64 Mbytes
64 Mbytes
64 Mbytes
64 Mbytes
Rev. 6.00 Jul. 15, 2009 Page 113 of 816
REJ09B0237-0600