SH7619_09 Datasheet, PDF (838/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Item
Page Revision (See Manual for Details)
13.3.5 DMA Operation
Register (DMAOR)
338 Added
[Notice]
[Workaround]
15.3.9 FIFO Control Register 407
(SCFCR)
Amended
Bit Description
3
Modem Control Enable
Enables modem control signals CTS and RTS.
In synchronous mode, clear this bit to 0.
This bit is available only in SCFCR_0 and SCFCR_1. In
SCFCR_2, this bit is reserved. The initial value is 0 and
the write value should always be 0.
0: Modem signal disabled*
1: Modem signal enabled
Note: * The CTS pin state has no effect on transmit
operations regardless of the input value. The
RTS pin state has no effect on receive
operations, either.
16.3.1 Mode Register
(SIMDR)
450 Amended
Initial
Bit Bit Name Value R/W Description
5
0
R Reserved
This bit is always read as 0.
The write value should
always be 0.
Rev. 6.00 Jul. 15, 2009 Page 798 of 816
REJ09B0237-0600