SH7619_09 Datasheet, PDF (533/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 16 Serial I/O with FIFO (SIOF)
Transmit/Receive Reset: The SIOF can separately reset the transmit and receive units by setting
the following bits to 1.
• Transmit reset: TXRST bit in SICTR
• Receive reset: RXRST bit in SICTR
Table 16.11 shows the details of initialization upon transmit or receive reset.
Table 16.11 Transmit and Receive Reset
Type
Transmit reset
Receive reset
Objects Initialized
SITDR
Transmit FIFO write pointer and read pointer
TCRDY, TFEMP, and TDREQ bits in SISTR
TXE bit in SICTR
SIRDR
Receive FIFO write pointer and read pointer
RCRDY, RFFUL, and RDREQ bits in SISTR
RXE bit in SICTR
Module Stop Mode: The SIOF stops the transmit/receive operation in module stop mode. And all
the registers in SIOF are retained.
Rev. 6.00 Jul. 15, 2009 Page 493 of 816
REJ09B0237-0600