SH7619_09 Datasheet, PDF (63/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 2 CPU
Section 2 CPU
2.1 Features
• General registers: 32-bit register × 16
• Basic instructions: 62
• Addressing modes: 11
Register direct (Rn)
Register indirect (@Rn)
Post-increment register indirect (@Rn+)
Pre-decrement register indirect (@-Rn)
Register indirect with displacement (@disp:4, Rn)
Index register indirect (@R0, Rn)
GBR indirect with displacement (@disp:8, GBR)
Index GBR indirect (@R0, GBR)
PC relative with displacement (@disp:8, PC)
PC relative (disp:8/disp:12/Rn)
Immediate (#imm:8)
2.2 Register Configuration
There are three types of registers: general registers (32-bit × 16), control registers (32-bit × 3), and
system registers (32-bit × 4).
Rev. 6.00 Jul. 15, 2009 Page 23 of 816
REJ09B0237-0600