SH7619_09 Datasheet, PDF (700/860 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 22 Ethernet Physical Layer Transceiver (PHY)
(3) Parallel Detection
If the PHY module is connected to a device lacking the ability to auto-negotiate (i.e. no FLPs are
detected), it is able to determine the speed of the link based on either 100M MLT-3 symbols or
10M Normal Link Pulses. In this case the link is presumed to be Half Duplex per the IEEE
standard. This ability is known as "Parallel Detection. This feature ensures interoperability with
legacy link partners. If a link is formed via parallel detection, then bit 0 in register 6 is cleared to
indicate that the Link Partner is not capable of auto-negotiation. The controller (EtherC) has
access to this information via the management interface (SMI). If a fault occurs during parallel
detection, bit 4 of register 6 is set.
Register 5 is used to store the Link Partner Ability information, which is coded in the received
FLPs. If the Link Partner is not auto-negotiation capable, then register 5 is updated after
completion of parallel detection to reflect the speed capability of the Link Partner.
(4) Re-starting Auto-negotiation
Auto-negotiation can be re-started at any time by setting register 0, bit 9. Auto-negotiation will
also re-start if the link is broken at any time. A broken link is caused by signal loss. This may
occur because of a cable break, or because of an interruption in the signal transmitted by the Link
Partner. Auto-negotiation resumes in an attempt to determine the new link configuration.
If the management entity re-starts Auto-negotiation by writing to bit 9 of the control register, the
PHY module will respond by stopping all transmission/receiving operations. Once the
break_link_timer is done, in the Auto-negotiation state-machine (approximately 1200ms) the auto-
negotiation will re-start. The Link Partner will have also dropped the link due to lack of a received
signal, so it too will resume auto-negotiation detection is disabled.
(5) Auto-negotiation Disabling
Auto-negotiation is disabled by setting the bit 12 in the register 0 to 0. The device forcibly reflects
the information in the bit 13 (SPEED) and bit 8 (Duplex) in the register 0 to the operation speed.
Information in the bit 13 (SPEED) and bit 8 (Duplex) in the register 0 is ignored while auto-
negotiation is enabled.
Rev. 6.00 Jul. 15, 2009 Page 660 of 816
REJ09B0237-0600